1. Field of the Invention
An aspect of the present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
As a technique for achieving a fine structure of wiring patterns or the like in a semiconductor integrated circuit or the like, there is proposed a pattern forming method in which side wall patterns are formed on side walls of core patterns formed on a target film and in which the target film masked with the side wall patterns or patterns embedded in between the side wall patterns are processed to form wiring patterns, gate electrodes, etc. (e.g. see U.S. Pat. No. 6,063,688). By such method, for example, line-and-space-shaped periodic patterns can be formed.
In the periodic patterns such as line-and-space patterns, even when end patterns and a central pattern are designed to be equal, each end pattern and the central pattern are different in arrangement environment. Accordingly, each end pattern and the central pattern are different in the influence of a proximity effect caused in a manufacturing process, and there is a possibility that dimensional error may occur.